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Surote
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Nov 25, 2019

Which CPU is the Analysis plane on F5 chassis ?

Based on this article https://support.f5.com/csp/article/K15468, All even CPUs are TMM, All odd CPUs are other process except the last one(analysis plane).

Is the article valid for F5 chassis. I would like to know which blade's CPU on a chassis handle analysis plane ?

 

Example My F5 CPUs

 

F5-BIGIP-SYSTEM-MIB::sysMultiHostCpuUser5s."1".1 = Gauge32: 6

F5-BIGIP-SYSTEM-MIB::sysMultiHostCpuUser5s."1".2 = Gauge32: 8

F5-BIGIP-SYSTEM-MIB::sysMultiHostCpuUser5s."1".3 = Gauge32: 3

F5-BIGIP-SYSTEM-MIB::sysMultiHostCpuUser5s."1".4 = Gauge32: 3

F5-BIGIP-SYSTEM-MIB::sysMultiHostCpuUser5s."1".5 = Gauge32: 11

F5-BIGIP-SYSTEM-MIB::sysMultiHostCpuUser5s."1".6 = Gauge32: 3

F5-BIGIP-SYSTEM-MIB::sysMultiHostCpuUser5s."1".7 = Gauge32: 15

F5-BIGIP-SYSTEM-MIB::sysMultiHostCpuUser5s."1".8 = Gauge32: 1

F5-BIGIP-SYSTEM-MIB::sysMultiHostCpuUser5s."1".9 = Gauge32: 10

F5-BIGIP-SYSTEM-MIB::sysMultiHostCpuUser5s."1".10 = Gauge32: 1

F5-BIGIP-SYSTEM-MIB::sysMultiHostCpuUser5s."1".11 = Gauge32: 10

F5-BIGIP-SYSTEM-MIB::sysMultiHostCpuUser5s."1".12 = Gauge32: 5

F5-BIGIP-SYSTEM-MIB::sysMultiHostCpuUser5s."1".13 = Gauge32: 8

F5-BIGIP-SYSTEM-MIB::sysMultiHostCpuUser5s."1".14 = Gauge32: 2

F5-BIGIP-SYSTEM-MIB::sysMultiHostCpuUser5s."1".15 = Gauge32: 14

F5-BIGIP-SYSTEM-MIB::sysMultiHostCpuUser5s."1".16 = Gauge32: 4

F5-BIGIP-SYSTEM-MIB::sysMultiHostCpuUser5s."1".17 = Gauge32: 13

F5-BIGIP-SYSTEM-MIB::sysMultiHostCpuUser5s."1".18 = Gauge32: 1

F5-BIGIP-SYSTEM-MIB::sysMultiHostCpuUser5s."1".19 = Gauge32: 13

F5-BIGIP-SYSTEM-MIB::sysMultiHostCpuUser5s."1".20 = Gauge32: 0

F5-BIGIP-SYSTEM-MIB::sysMultiHostCpuUser5s."1".21 = Gauge32: 10

F5-BIGIP-SYSTEM-MIB::sysMultiHostCpuUser5s."1".22 = Gauge32: 1

F5-BIGIP-SYSTEM-MIB::sysMultiHostCpuUser5s."1".23 = Gauge32: 8

F5-BIGIP-SYSTEM-MIB::sysMultiHostCpuUser5s."1".24 = Gauge32: 0

F5-BIGIP-SYSTEM-MIB::sysMultiHostCpuUser5s."3".1 = Gauge32: 4

F5-BIGIP-SYSTEM-MIB::sysMultiHostCpuUser5s."3".2 = Gauge32: 1

F5-BIGIP-SYSTEM-MIB::sysMultiHostCpuUser5s."3".3 = Gauge32: 3

F5-BIGIP-SYSTEM-MIB::sysMultiHostCpuUser5s."3".4 = Gauge32: 7

F5-BIGIP-SYSTEM-MIB::sysMultiHostCpuUser5s."3".5 = Gauge32: 14

F5-BIGIP-SYSTEM-MIB::sysMultiHostCpuUser5s."3".6 = Gauge32: 2

F5-BIGIP-SYSTEM-MIB::sysMultiHostCpuUser5s."3".7 = Gauge32: 11

F5-BIGIP-SYSTEM-MIB::sysMultiHostCpuUser5s."3".8 = Gauge32: 1

F5-BIGIP-SYSTEM-MIB::sysMultiHostCpuUser5s."3".9 = Gauge32: 8

F5-BIGIP-SYSTEM-MIB::sysMultiHostCpuUser5s."3".10 = Gauge32: 1

F5-BIGIP-SYSTEM-MIB::sysMultiHostCpuUser5s."3".11 = Gauge32: 10

F5-BIGIP-SYSTEM-MIB::sysMultiHostCpuUser5s."3".12 = Gauge32: 1

F5-BIGIP-SYSTEM-MIB::sysMultiHostCpuUser5s."3".13 = Gauge32: 15

F5-BIGIP-SYSTEM-MIB::sysMultiHostCpuUser5s."3".14 = Gauge32: 3

F5-BIGIP-SYSTEM-MIB::sysMultiHostCpuUser5s."3".15 = Gauge32: 14

F5-BIGIP-SYSTEM-MIB::sysMultiHostCpuUser5s."3".16 = Gauge32: 2

F5-BIGIP-SYSTEM-MIB::sysMultiHostCpuUser5s."3".17 = Gauge32: 8

F5-BIGIP-SYSTEM-MIB::sysMultiHostCpuUser5s."3".18 = Gauge32: 3

F5-BIGIP-SYSTEM-MIB::sysMultiHostCpuUser5s."3".19 = Gauge32: 11

F5-BIGIP-SYSTEM-MIB::sysMultiHostCpuUser5s."3".20 = Gauge32: 8

F5-BIGIP-SYSTEM-MIB::sysMultiHostCpuUser5s."3".21 = Gauge32: 10

F5-BIGIP-SYSTEM-MIB::sysMultiHostCpuUser5s."3".22 = Gauge32: 1

F5-BIGIP-SYSTEM-MIB::sysMultiHostCpuUser5s."3".23 = Gauge32: 10

F5-BIGIP-SYSTEM-MIB::sysMultiHostCpuUser5s."3".24 = Gauge32: 0

 

Thanks,

 

  • Is the Chassis being used as a Viprion Cluster, or a VCMP host?

     

    If it is a cluster, then the Analysis plane CPUs will be the last CPU on the blade

    F5-BIGIP-SYSTEM-MIB::sysMultiHostCpuUser5s."1".24 = Gauge32: 0

    F5-BIGIP-SYSTEM-MIB::sysMultiHostCpuUser5s."3".24 = Gauge32: 0

     

    The SNMP reporting has started listing the CPUs from 1, so odd CPUs will be data plane, and even CPUs will be control plane. This is different to the Linux reporting, where the CPUs are listed from 0.