Lightboard Lessons: CPU Hyper-Threads and TMM

In this episode of Lightboard Lessons, Jason details how BIG-IP’s Traffic Management Microkernel (TMM) utilizes Intel’s Hyper-Threading Technology (on applicable platforms) and the impacts depending on the version of TMOS. In versions before 11.5, each hyper-thread has a separate TMM running. In versions 11.5 and later, TMM and control plane tasks are assigned to separate hyper-threads by default, a behavior we call HTSplit. This behavior is controlled by the scheduler.splitplanes.ltm database key.

Note: This video is a result of a great question by community member Aditya. You can read about the background here.


  • K15003: Data plane and control plane tasks use separate logical cores when the BIG-IP system CPU uses Hyper-Threading Technology
  • K23505424: Overview of the HTSplit feature
  • K14358: Overview of Clustered Multiprocessing (11.3.0 and later)
  • K10095: Error Message: Clock advanced by ticks
  • K16469: Certain BIG-IP ASM control plane processes are now pinned to the highest-numbered logical CPU core
Published Sep 06, 2017
Version 1.0

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